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Performance in most pattern classifiers is improved when redundant or irrelevant features are removed, however, this is mainly achieved by high demanding computational methods or successive classifiers construction. This paper shows how Associative Memories can be used to get a mask value which represents a subset of features that clearly identifies irrelevant or redundant information for classification purposes, therefore, classification accuracy is improved while significant computational costs in the learning phase are reduced. An optimal subset of features allows register size optimization, which contributes not only to significant power savings but to a smaller amount of synthesized logic, furthermore, improved hardware architectures are achieved due to functional units size reduction, as a result, it is possible to implement parallel and cascade schemes for pattern classifiers on the same ASIC.
Feature Selection, Pattern Classifier, Masking Techniques, Supervised Learning.